In the field of electronic system manufacturing, the use of surface mount technology to attach and connect integrated circuit components onto printed circuit boards has continued to grow. As is known in the art, surface mountable integrated circuit packages have leads or pins that allow for their solder connection to a planar surface of a circuit board, eliminating the need for plated-through holes through the circuit board. Surface mount technology thus increases the theoretical component density of the circuit board, as well as the degrees of freedom available to the board designer, as the location of integrated circuit leads need only be considered for a single surface plane of a multi-layer circuit board, rather than for all planes of the board.
However, the surface mountable integrated circuit is subjected to greater thermal and mechanical stress during the assembly procedure than are integrated circuits of the dual-in-line and similar package types. The mounting of a dual-in-line integrated circuit package to the circuit board is accomplished by wave solder of the underside of the circuit board (i.e., the side opposite that of the integrated circuit), as the pins of the integrated circuit package extend through plated through-holes in the circuit board. Accordingly, the circuit board itself insulates the integrated circuit package body from the high solder temperatures and harsh chemicals to which the soldered lead tips are subjected. Since the leads of a surface mountable package are soldered at the same surface at which the integrated circuit package body is located, however, the integrated circuit package body and its contents are directly subjected to the high temperature of the flowing solder, and to harsh chemicals used in the soldering process, such as flux, solder, and cleaning solvents.
Conventional surface-mountable integrated circuits that contain only a semiconductor device and its wire connections are generally able to withstand the thermal, chemical and mechanical stresses presented by the surface mount process. As such, the use of surface mount techniques in the manufacture of circuit boards of many types has become widespread, obtaining the density advantages provided by this technology.
In recent years, the use of battery power for many electronic circuit functions has become available, primarily due to advances made in complementary metal-oxide-semiconductor (CMOS) fabrication and design technology. As is well known, CMOS integrated circuits are able to operate with extremely low active power requirements; in the case of CMOS memory devices, such as static random access memories (SRAMs), the power requirements for data retention are especially low. These low power requirements allow operation and data retention in electronic systems to be powered by conventional lithium batteries and other cell types, improving the portability and reliability of modern electronic systems.
It has therefore become desirable to provide a battery with an integrated circuit in a single package, so that battery backup functionality may be easily implemented in the system. Example of packages containing both a semiconductor integrated circuit and a battery, for use in surface mount applications, are described in U.S. Pat. No. 5,557,504 ("the '504 patent"), assigned to SGS-Thomson Microelectronics, Inc., which is incorporated herein by reference.
As described in the '504 patent, conventional batteries are unable to reliably withstand the temperatures and chemical conditions to which an integrated circuit is subjected during surface mount assembly, however. For example, some types of batteries can be irreparably damaged by exposure to temperatures as low as 181.degree. C. which is below the temperature of certain solders used in the surface mount process. Other components, such as quartz crystal resonators used in connection with on-chip oscillators, are also vulnerable to these harsh environmental conditions. The harsh chemical environment of the surface mount process can also damage the physical construction of these components.
The '504 patent discloses an integrated circuit package 10 that includes a component module 12 releasably affixed to a small outline integrated circuit (SOIC) chip package 14, as shown in FIG. 1. The component module 12 includes a battery or other temperature or chemical sensitive devices (not shown) encased within a plastic body 16. Extending downward from the component module body 16 are a plurality of electrical connector pins 18 that are sized to be coupled with corresponding female connectors 20 in the SOIC chip package 14. Also extending downward from the component module body 16 are snap members 22 that releasably engage lower surfaces 24 of the SOIC chip package 14 to releasably couple the component module 12 to the SOIC chip package 14.
As is typical, extending from opposite sides 26, 28 of the SOIC chip package 14 are electrical leads 30 that are bent downward in order to electrically connect the SOIC chip package 14 to a surface of a printed circuit board (not shown). The SOIC chip package 14 is a rigid and relatively thick package, encompassing one or more integrated circuits, that is sufficiently strong to support being engaged by the snap members 22. In contrast, many other types of chip packages, such as ball-grid array (BGA) packages are too thin to support being engaged by the snap members 22.